发明名称 Semiconductor integrated circuit and method for testing same
摘要 An LSI which makes scan testing possible without compromising security is provided. Flip-flops that constitute a scan chain are reset when scan testing is initiated or terminated by the edges of a mode signal for switching between normal operations and scan testing. In addition, during scan testing, internal memory means is made inaccessible. Further, a dummy flip-flop that operates only during scan testing is connected to the scan chain, and shifting out by the scan chain during normal operations is made impossible.
申请公布号 US7487418(B2) 申请公布日期 2009.02.03
申请号 US20030647217 申请日期 2003.08.26
申请人 SONY CORPORATION 发明人 KAYUKAWA YOSHITAKA;AOKI TETSUYA;HAMAGUCHI TAKAHIRO;OSHIMA NORIYUKI
分类号 G01R31/28;G01R31/3177;G01R31/317;G01R31/3185;G01R31/40;G06F11/22;H01L21/66 主分类号 G01R31/28
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