SEMICONDUCTOR PACKAGE AND STACKED WAFER LEVEL PACKAGE, AND METHOD OF MANUFACTURING THE STACKED WAFER LEVEL PACKAGE

摘要

A semiconductor package and a stacked wafer level package, and a method of manufacturing a stacked wafer level package are provided to improve data storage capacity and data treatment speed by integrating at least two wafer level packages. A base substrate(110) comprises a chip area(CR) and a peripheral area(PR) positioned at the neighboring area of the chip. The semiconductor chip arranged on the chip area comprises a bonding pad(124). The first insulating layer pattern(130) covering the chip area and the peripheral area exposes the bonding pad. A rewiring pattern(140) arranged on the first insulating layer pattern is extended to the peripheral area from each bonding pad. The second insulating layer pattern(150) arranged on the first insulating layer pattern exposes a part arranged in the peripheral area of each rewiring pattern.