发明名称 METAL LINE LAYOUT METHOD
摘要 A metal line lay-out method is provided to decrease the coupling capacitances by securing the distance between the dummy metal line and the metal line transmitting the sensitive critical signal. Power lines(10,12) are separated from each other and are arranged parallel. One or more first metal line(20) is parallel arranged between the power lines. The both sides of the second metal line(30) is arranged adjacent to the power line or the first metal line. A dummy metal line(40) is arranged between the first metal lines. The first signal transmitted through the first metal line is less sensitive to the influence of capacitance than the second signal transmitted through the second metal line.
申请公布号 KR20090011960(A) 申请公布日期 2009.02.02
申请号 KR20070076032 申请日期 2007.07.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YEON, EUN MI;RYU, NAM GYU;LEE, JONG SUNG;PARK, JI EUN;YOON, YOUNG HEE
分类号 H01L27/04 主分类号 H01L27/04
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