发明名称 ENCODING HARDWARE END LOOP INFORMATION ONTO AN INSTRUCTION
摘要 Methods and apparatus for encoding information regarding a hardware loop of a set of packets is provided, each packet (400) containing instructions. The information is encoded into one or more bits of at least one instruction (300) in the set of packets. The information may indicate whether a packet is or is not an end packet of the loop. Information regarding two hardware loops may be encoded where information regarding the first loop is encoded into an instruction at a first position in each packet and information regarding the second loop is encoded into an instruction at a second position in each packet. End instruction information may be encoded into an instruction not having encoded loop information at the same bit positions reserved for the encoded loop information, the end instruction information indicating whether an instruction is the last instruction of a packet and the length of a packet.
申请公布号 KR20090009966(A) 申请公布日期 2009.01.23
申请号 KR20087030038 申请日期 2007.04.20
申请人 QUALCOMM INCORPORATED 发明人 PLONDKE ERICH;LESTER ROBERT ALLAN;CODRESCU LUCIAN;AHMED MUHAMMAD
分类号 G06F9/30;G06F9/38;G06F9/45 主分类号 G06F9/30
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