| 摘要 |
PROBLEM TO BE SOLVED: To provide a programmable logic circuit device capable of obtaining the most suitable performance using a software IP. SOLUTION: The programmable logic circuit device includes a plurality of computing elements 10 each of which includes a first path to which a flip flop circuit 16 having a first clock signal inputted thereto is connected and a second path to which a lookup table 12 and a flip flop circuit 14 having a second clock signal inputted thereto are connected. The first path and second path are set per computing element 10. The computing elements 10 are so connected that two computing elements 10 mounted as applications are in both ends and a plurality of computing elements 10 serving as buffers are in the middle. COPYRIGHT: (C)2009,JPO&INPIT
|
