| 摘要 |
PROBLEM TO BE SOLVED: To provide a DRAM which can be operated at high speed while keeping low standby current. SOLUTION: One embodiment of this semiconductor device (DRAM) has a plurality of digit line pairs (digit True, Not) connected to a memory cell 21, a common signal line pair (main I/O True, Not) connected to the plurality of digit line pairs in common, a main I/O equalizer 17 performing pre-charge of the common signal line pair, and a control circuit setting whether pre-charge operation is continued or not independently of a signal level of a mask signal (mask signal) input from the outside. COPYRIGHT: (C)2009,JPO&INPIT
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