发明名称 PROGRAMMABLE BIAS FOR A MEMORY ARRAY
摘要 A method determines a body bias for a memory cell. A supply voltage is applied to the memory cell and a bit line is precharged to a voltage lower than the supply voltage. A programmable bias voltage circuit provides a bias voltage to the memory cell in response to values on its input. Initial test values for the input are used. The memory cell is tested to determine a pass or a fail condition of the memory cell. The initial values are retained as the input values if the memory cell passes. If the memory cell fails, the memory cell is tested at changed values for the input. If the changed input values result in the memory cell being in a pass condition, the programmable bias voltage circuit is configured, in non-volatile fashion, to have the changed input values.
申请公布号 US2009021989(A1) 申请公布日期 2009.01.22
申请号 US20070780251 申请日期 2007.07.19
申请人 RASHED MAHBUB M;BOOTH ROBERT E;DAVAR SUSHAMA;NALLAPATI GIRI 发明人 RASHED MAHBUB M.;BOOTH ROBERT E.;DAVAR SUSHAMA;NALLAPATI GIRI
分类号 G11C7/00 主分类号 G11C7/00
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