METHOD AND CIRCUIT FOR LOW-POWER DETECTION OF SOLDER-JOINT NETWORK FAILURES IN DIGITAL ELECTRONIC PACKAGES

摘要

A low power circuit 100 and method for detects in-situ failures or precursors to failures in solder- joint networks 91 on actual operational devices and packages in the field. An amplifying detector 102 such as provided by a common- gate transistor sources current to a monitor network 90 to generate a signal voltage and a reference voltage that is sensitive to the low voltage applied to the other side of the network. Generation of this self-adjusting reference voltage makes the comparator 104 insensitive to the network low-voltage. Additional power savings and performance gains can be provided with the addition of a differential amplifier to set a fixed bias point a?d a level shifter to cancel noise. The detected failure or precursor of a selected monitor solder- joint network (s) 90 is an indicator of the integrity of other operational solder- joint networks 91 in the package, on the PWB or between PWBs.