发明名称 Method and program for designing semiconductor integrated circuit
摘要 A method of designing a semiconductor integrated circuit includes: performing a circuit simulation of a cell with changing a parameter that specifies a layout pattern around the cell; and generating a delay function expressing a delay value of the cell as a function of the parameter, based on a result of the circuit simulation. The method further includes: generating a layout data indicating a layout of the semiconductor integrated circuit, based on a cell-based design technique. The method further includes: referring to the generated layout data to extract the parameter associated with a target cell included in the semiconductor integrated circuit; and calculating a delay value of the target cell by using the extracted parameter and the delay function.
申请公布号 US2009024973(A1) 申请公布日期 2009.01.22
申请号 US20080219056 申请日期 2008.07.15
申请人 NEC ELECTRONICS CORPORATION 发明人 YAMADA KENTA
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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