发明名称 |
TRANSMISSION SYSTEM, TRANSMITTING APPARATUS, RECEIVING APPARATUS, AND TRANSMISSION METHOD |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a circuit for reducing bit errors generated in data received by a receiving apparatus, with a circuit of a small-scaled and simplified logic gate. <P>SOLUTION: A circuit for reducing bit errors generated in a data stream received by a receiving apparatus includes a circuit of a small-scaled and simplified logic gate. A transmission system for transmitting a data stream includes: a transmitting apparatus for transmitting a first transmission signal formed into edged data waveform including a first timing edge indicative of timing to acquire data contained in the data stream and a level signal of a signal level corresponding to a value of the relevant data; and a receiving apparatus for outputting the data value corresponding to the signal level detected in the timing designated by the first timing edge in the edged data waveform. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
申请公布号 |
JP2009017548(A) |
申请公布日期 |
2009.01.22 |
申请号 |
JP20080163319 |
申请日期 |
2008.06.23 |
申请人 |
ADVANTEST CORP |
发明人 |
ICHIYAMA KIYOTAKA;ISHIDA MASAHIRO |
分类号 |
H04L7/04 |
主分类号 |
H04L7/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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