发明名称 |
High Performance Multilevel Cache Hierarchy |
摘要 |
A digital system is provided with a hierarchical memory system having at least a first and second level cache and a higher level memory. If a requested data item misses in both the first cache level and in the second cache level, a line of data containing the requested data is obtained from a higher level of the hierarchical memory system. The line of data is allocated to both the first cache level and to the second cache level simultaneously.
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申请公布号 |
US2009024796(A1) |
申请公布日期 |
2009.01.22 |
申请号 |
US20070779784 |
申请日期 |
2007.07.18 |
申请人 |
NYCHKA ROBERT;PRASAD JANARDAN;ACHARYA NILESH;RAWAL ADITYA;NAWAZ AMBAR |
发明人 |
NYCHKA ROBERT;PRASAD JANARDAN;ACHARYA NILESH;RAWAL ADITYA;NAWAZ AMBAR |
分类号 |
G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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