摘要 |
<p>A method for operating a memory checker (100) in a command monitoring architecture comprising at least two processing lanes (102, 104) comprises a first step of receiving a command to activate a first test mode. The first test mode comprises an initial step of inverting data read from a memory (112, 114) and inverting data written to the memory (112, 114). Next, it is determined if there is a match between data associated with a first processing lane (102) and retrieved by a second checker logic (120) associated with a second processing lane (104) and with data associated with a second processing lane (104) and retrieved by a first checker logic (116) associated with the first processing lane (102). A failure in the memory (112, 114) is determined if there is no match.
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