发明名称 Method and apparatus for latent fault memory scrub in memory upon which a computer hardware strongly relies
摘要 <p>A method for operating a memory checker (100) in a command monitoring architecture comprising at least two processing lanes (102, 104) comprises a first step of receiving a command to activate a first test mode. The first test mode comprises an initial step of inverting data read from a memory (112, 114) and inverting data written to the memory (112, 114). Next, it is determined if there is a match between data associated with a first processing lane (102) and retrieved by a second checker logic (120) associated with a second processing lane (104) and with data associated with a second processing lane (104) and retrieved by a first checker logic (116) associated with the first processing lane (102). A failure in the memory (112, 114) is determined if there is no match. </p>
申请公布号 EP1860558(A3) 申请公布日期 2009.01.21
申请号 EP20070108806 申请日期 2007.05.24
申请人 HONEYWELL INTERNATIONAL INC. 发明人 THOMPSON, STEVEN R.
分类号 G06F11/10;G05B9/03;G05D1/00;G06F11/16;G11C29/36 主分类号 G06F11/10
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