发明名称 Measuring and predicting VLSI chip reliability and failure
摘要 This embodiment replaces the use of LBIST to get a pass or no-pass result. A selective signature feature is used to collect the top failing paths, by shmooing the chip over a cycle time. These paths can be stored on-chip or off-chip, for later use. Once the chip is running in the field for a certain time, the same procedure is performed to collect the top failing paths, and this is compared with the stored old paths. If the order of the top paths changes, it indicates that (for example) there is a path (not the slowest path before) that slows more than others, which could be potential reliability concern. Therefore, a potential reliability failure is identified in the field.
申请公布号 US7480882(B1) 申请公布日期 2009.01.20
申请号 US20080049344 申请日期 2008.03.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SONG PEILIN;HEIDEL DAVID;MOTIKA FRANCO;STELLARI FRANCO
分类号 G06F17/50;G01R31/28;G01R31/3187;G06F11/27;G06F19/00 主分类号 G06F17/50
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