发明名称 LATERAL JUNCTION FIELD EFFECT TRANSISTOR, AND METHOD OF MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a lateral junction field effect transistor and a method of manufacturing the same, which can suppress generation of a leakage current in an OFF operation. SOLUTION: An n-type epitaxial layer 4 and a gate region 5 are formed in sequence on a p<SP>-</SP>epitaxial layer 3. A gate electrode 12a is electrically connected to the gate region 5. A source electrode 12b and a drain electrode 12c are arranged separately from each other so as to sandwich the gate electrode 12a, and electrically connected to the n-type epitaxial layer 4 via an n<SP>+</SP>source region 6 and an n<SP>+</SP>drain region 7, respectively. A concave portion which reaches the n-type epitaxial layer 4 is formed on the side of the n<SP>+</SP>source region 6. A p<SP>+</SP>impurity region 8 is formed so as to reach the p<SP>-</SP>epitaxial layer 3 from the bottom of the concave portion. A control electrode 12d is electrically connected to the p<SP>+</SP>impurity region 8, and electrically insulated from the source electrode 12b. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009010433(A) 申请公布日期 2009.01.15
申请号 JP20080267705 申请日期 2008.10.16
申请人 SUMITOMO ELECTRIC IND LTD 发明人 MASUDA KENRYO;NAMIKAWA YASUO
分类号 H01L21/337;H01L29/808 主分类号 H01L21/337
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