A method is provided of fabricating a multilayer planar electronic circuit device on a substrate comprising the steps providing a patterned layer of a first conducting material, depositing a layer of a first insulating material and providing a patterned layer of a second conducting material. The method enables the fabrication of complex electronic circuit devices by depositing core material layers and forming the required conducting structures using an imprinting technique. High tolerances are possible at fast processing speed, while keeping processing material costs low.
申请公布号
WO2008133515(A3)
申请公布日期
2009.01.15
申请号
WO2008NL50255
申请日期
2008.04.25
申请人
POLYMER VISION LIMITED;READER, ALEC;VAN AERLE, NICOLAAS ALDEGONDA JAN MARIA;BALLA, TOBIAS
发明人
READER, ALEC;VAN AERLE, NICOLAAS ALDEGONDA JAN MARIA;BALLA, TOBIAS