| 摘要 |
PROBLEM TO BE SOLVED: To provide methods and apparatuses for detecting and/or correcting errors in binary data by utilizing LDPC codes. SOLUTION: For facilitating hardware implementation, messages are quantized to integral multiples of 1/2 In2. Messages are transformed between more compact variable and less compact constraint message representation formats. The variable node message format allows variable node message operations to be performed through simple additions and subtractions, while the constraint node representation allows constraint node message processings that are performed through simple additions and subtractions. Variable and constraint nodes are realized by using an accumulator module, subtractor module and delay pipeline. COPYRIGHT: (C)2009,JPO&INPIT
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