发明名称 Clock data recovery and synchronization in interconnected devices
摘要 For synchronizing a master device and a slave device connected by a data transfer link, the master device measures a phase offset in a signal received from the slave device with respect to the master's clock signal. The master determines a control symbol based on the phase offset. The master encodes the control symbol in a transmit signal for the slave. The slave decodes the control symbol from the signal received from the master. The slave uses the control symbol to adjust the phase shift to compensate for the phase offset of a signal to be transmitted to the master device. When the phase compensated signal is received at the master, its phase offset is smaller than the original phase offset. This procedure can be performed iteratively until the phase offset is within a desired tolerance.
申请公布号 US2009015304(A1) 申请公布日期 2009.01.15
申请号 US20070774977 申请日期 2007.07.09
申请人 YIN JOHN;HOYER BRYAN H 发明人 YIN JOHN;HOYER BRYAN H.
分类号 H03L7/00 主分类号 H03L7/00
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