发明名称 Verfahren zum Testen einer integrierten Schaltung
摘要 Method for testing integrated circuits using a self-test circuit contained within the circuit. Testing is begun using a self-test device or so-called built in self-test (BIST) module before the integrated circuit is connected to an external test device (ET) that reads in and or analyzes the results of the self-test. Independent claims are made for: (1) a self- test device for use with an integrated circuit including a self-test controller; (2) a self-test circuit that is able to shut off certain parts of the integrated circuit during testing; (3) a wafer containing a number of integrated circuits which are electrically connected during testing, but that are later cut apart following testing.
申请公布号 DE50114537(D1) 申请公布日期 2009.01.15
申请号 DE2001514537 申请日期 2001.07.16
申请人 INFINEON TECHNOLOGIES AG 发明人 ZETTLER, THOMAS DR.
分类号 G01R31/3185;G01R31/317 主分类号 G01R31/3185
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