发明名称 CIRCULAR BUFFER BASED RATE MATCHING
摘要 Systems and methodologies are described that facilitate employing circular buffer based rate matching. Encoded block(s) that include systematic, parity 1, and parity 2 bits can be generated using turbo code. Bit type can be identified to separate bits into distinct groups. Systematic bits can be interleaved together to generate a randomized sequence of systematic bits, parity 1 bits can be interleaved together to yield a randomized sequence of parity 1 bits, and parity 2 bits can be interleaved together to output a randomized sequence of parity 2 bits. The randomized sequences of parity 1 bits and parity 2 bits can be interlaced together in an alternating manner. The randomized sequence of systematic bits can be inserted into a circular buffer, and upon inserting the entire sequence, the interlaced parity bits can be inserted into the circular buffer (e.g., until reaching capacity). Bits inserted into the circular buffer are transmitted.
申请公布号 WO2008119048(A3) 申请公布日期 2009.01.15
申请号 WO2008US58500 申请日期 2008.03.27
申请人 QUALCOMM INCORPORATED;MALLADI, DURGA, PRASAD;MONTOJO, JUAN;WEI, YONGBIN 发明人 MALLADI, DURGA, PRASAD;MONTOJO, JUAN;WEI, YONGBIN
分类号 H04L1/00 主分类号 H04L1/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利