发明名称 Memory device performing write leveling operation
摘要 A memory device includes a multiplexing unit, a pipe latch unit, and an output driver. The multiplexing unit outputs data input from global input/output lines in a normal mode and outputs write leveling data in a writing leveling mode being entered in response to a write leveling signal. The pipe latch unit latches the data outputted from the multiplexing unit and outputting the latched data. The output driver outputs the latched data outputted from the pipe latch unit.
申请公布号 US2009016119(A1) 申请公布日期 2009.01.15
申请号 US20070819815 申请日期 2007.06.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JANG JI-EUN
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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