发明名称 FAILURE ANALYSIS METHOD AND FAILURE ANALYSIS DEVICE
摘要 PROBLEM TO BE SOLVED: To dispense with terminal connection to the outside, and to visualize a current path and a defect with submicron space resolution, when analyzing a failure of a semiconductor chip. SOLUTION: This method includes processes for fixing and irradiating an LSI chip 1 with a laser beam 2 for generating a photoelectric current, scanning and irradiating an observation domain of the LSI chip 1 with a laser beam 3 for heating, detecting a current change generated in the LSI chip 1 by a SQUID fluxmeter 4 by irradiation of the laser beam 2 for generating the photoelectric current and the laser beam 3 for heating, and analyzing a failure of the LSI chip 1 based on the current change detected by the SQUID fluxmeter 4. Irradiation of the laser beam 2 for generating the photoelectric current and the laser beam 3 for heating is performed from the rear surface side of the LSI chip 1, and detection by the SQUID fluxmeter 4 is performed on the surface side of the LSI chip 1. In analysis of the failure of the LSI chip 1, image processing is performed, for allowing a signal output from the SQUID fluxmeter 4 to correspond to a scanning point. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009008626(A) 申请公布日期 2009.01.15
申请号 JP20070172554 申请日期 2007.06.29
申请人 NEC ELECTRONICS CORP 发明人 FUTAGAWA KIYOSHI
分类号 G01R31/302;G01N27/00;G01N27/82;H01L21/66 主分类号 G01R31/302
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