发明名称 PREVENTION OF DATA LOSS DUE TO POWER FAILURE
摘要 In some embodiment, an arrangement is provided to prevent a loss of data in a memory due to a power failure for a computing system. When the power failure occurs, any pending memory write operations may be completed and dirty cache lines may be flushed back to the memory. Subsequently, the computing system may be put into a loss-prevention state, under which power may be turned off for all components in the computing system except the memory. The memory is powered by a battery pack which includes batteries and is in a self refresh state. When the power returns, applications and operating systems running in the computing system may resume what is left out when the power supply failure occurs, based at least in part on data retained in the memory. Other embodiments are described and claimed.
申请公布号 EP1828901(B1) 申请公布日期 2009.01.14
申请号 EP20050852009 申请日期 2005.11.17
申请人 INTEL CORPORATION 发明人 POISNER, DAVID;STEVENS, WILLIAM
分类号 G06F11/14 主分类号 G06F11/14
代理机构 代理人
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