发明名称 Semiconductor device and manufacturing method thereof
摘要 An interconnect trench is formed on a dielectric layer 12 and a first HSQ layer 14 formed on a semiconductor substrate, and a tantalum family barrier metal layer 24a is formed all over the substrate. Then a seed copper-containing metal layer 60 and a plated copper layer 62 are formed so as to fill a part of the interconnect trench. After that, a bias-sputtered copper-containing metal layer 64 is formed on the plated copper layer 62 so as to fill the remaining portion of the interconnect trench and then heat treatment is performed. As a result, a dissimilar metal contained in the bias-sputtered copper-containing metal layer 64 diffuses uniformly into the plated copper layer 62.
申请公布号 US7476611(B2) 申请公布日期 2009.01.13
申请号 US20040980596 申请日期 2004.11.04
申请人 NEC ELECTRONICS CORPORATION 发明人 KUNISHIMA HIROYUKI;TAKEWAKI TOSHIYUKI
分类号 H01L21/3205;H01L21/4763;H01L21/285;H01L21/288;H01L21/60;H01L21/768;H01L23/52;H01L23/532 主分类号 H01L21/3205
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