发明名称 Single ended switched capacitor circuit
摘要 A single-ended, non-differential switched capacitor circuit is disclosed which removes the effect of common mode noise. To this end, the circuit creates a capacitance divider using the sampling capacitors, Cs, to create a stable and noise-free common mode voltage (Vcom) signal. Once created, this Vcom signal is coupled across a large common mode capacitance, Ccom, which is preferably off chip, to further control its value. Thereafter, the voltage Vcom is preferably allowed to settle while the data is disconnected. In this way, the Vcom signal is not provided to the circuit, but instead is cleanly generated within the circuit itself when needed. Thereafter, the generated Vcom signal is paralleled with the integration capacitor, C1, to produce the non-differential output voltage Vout. Then, the sampling capacitors, Cs, are shorted to remove any charges stored on them and the process is repeated.
申请公布号 US7477079(B2) 申请公布日期 2009.01.13
申请号 US20040938002 申请日期 2004.09.10
申请人 CIRRUS LOGIC, INC. 发明人 GABORIAU JOHANN G.;WELSER JOSEPH J.
分类号 H03K17/00 主分类号 H03K17/00
代理机构 代理人
主权项
地址