| 摘要 |
A semiconductor memory device is provided to minimize difference between the target level of the level of the back bias voltage and the back bias voltage relatively by rapidly increasing the level of the back bias voltage. In a semiconductor memory device, a first voltage detection unit(200) detects the level of the back bias voltage(VBB) state in response to the first reference voltage(VREFB1) corresponding to the expected first target level. A second voltage detecting unit(240) detects the level of the back bias voltage stage in response to the second ground level voltage(VREFB2) corresponding to the expected second target level. An oscillation signal generating unit(210) produces the oscillation signal(OSC) oscillating to the cycle expected in response to the first detection signal(VBB EN) of the first voltage detection unit. A charge pumping part(220) drops the level of the back bias voltage terminal in response to the oscillation signal, and the electric charge discharge unit(250) increases the level of the back bias voltage stage in response to the second detection signal(VBB DISCH).
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