发明名称 |
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SYMMETRIC PACKAGING |
摘要 |
An IC package system having a symmetry packaging is provided to reduce the size while increasing the capacity by exposing the package connector. A die connection site(112) like the bond pad of the first integrated circuit(110) can be electrically connected to a package connector(104) or the other apparatuses of the IC package system(100). The die connection site is formed with two parallel rows. Each row is adjacent to the opposing edge of the first integrated circuit. A package lead(106) is formed with two parallel rows. The first row is adjacent to the die connection site and the package connector adjacent to the opposing edge of the first integrated circuit. The package connector is materially exposed to a substrate(102) and is adjacent to the package lead and the first integrated circuit. |
申请公布号 |
KR20090004630(A) |
申请公布日期 |
2009.01.12 |
申请号 |
KR20080063066 |
申请日期 |
2008.06.30 |
申请人 |
STATS CHIPPAC LTD. |
发明人 |
PARK, SOO SAN;HONG, BUM JOON;LEE, SANG HO;HA, JONG WOO |
分类号 |
H01L23/48;H01L23/12 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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