HIGH POWER ADDRESS DRIVER AND DISPLAY DEVICE EMPLOYING THE SAME

摘要

A high power address driver and display device employing the same is provided to reduce power consumption by supplying the reverse bias between the source terminal and bulk terminal of the pull-up MOS transistor. In a high power address driver and display device includes, the first address driver(AD1) includes the energy recovery circuit(ERC) and output stage(OST). The energy recovery circuit comprises the first resonance circuit(RC1) generating the charging signal and the second resonance circuit(RC2) generating the discharge signal. A first resonance circuit includes the first capacitor(C1), the first switching device(S1), the first diode(D1) and the first inductor(L1) which are connected in series. A second resonance circuit includes the second capacitor(C2), second switching element(S2), the second diode(D2), and the second inductor(L2) which are connected in series. An energy recovery circuit includes the third switching device(S3) and the fourth switching element(S4) which are parallel-connected with the second Node(N2).