发明名称 Memory synchronization method and refresh control circuit
摘要 Rank numbers specified by a second counter are refreshed in sequence by using a count value of a first counter which is initialized by a synchronous reset signal and counts timing for performing refresh, and the rank numbers specified by a refresh rank control unit are continuously refreshed in sequence in the case where the synchronous reset signal is active.
申请公布号 US7474581(B2) 申请公布日期 2009.01.06
申请号 US20070698165 申请日期 2007.01.26
申请人 NEC CORPORATION 发明人 TANAKA YUKIHIRO
分类号 G11C7/00 主分类号 G11C7/00
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