| 摘要 |
For determining an optimized wafer layout, at least two wafer layouts are specified for a given wafer, each wafer layout defining the location of a plurality of die with regard to the wafer. An optimization parameter value of at least one optimization parameter is determined for each of the at least two wafer layouts. The at least one optimization parameter includes at least one of a number of exposure fields necessary for exposing the respective wafer layout and a number of die of the wafer layout. The optimized wafer layout is selected out of the at least two wafer layouts depending on the optimization parameter values.
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