| 发明名称 |
METHOD AND SYSTEM FOR IMPLEMENTING CACHED PARAMETERIZED CELLS |
| 摘要 |
Parameterized cells are cached and provided by the plug-in to increase the speed and efficiency of an application for circuit design. This allows source design to be read-interoperable and also enables some basic write-interoperability in the source design.
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| 申请公布号 |
US2009007031(A1) |
申请公布日期 |
2009.01.01 |
| 申请号 |
US20070769568 |
申请日期 |
2007.06.27 |
| 申请人 |
CADENCE DESIGN SYSTEMS, INC. |
发明人 |
GINETTI ARNOLD;LAMANT GILLES S.C.;BISHOP RANDY |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
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