| 摘要 |
In a PLL circuit, an oscillation frequency is quickly and accurately locked to a target frequency. There is provided a PLL circuit including a VCO (10) that controls the frequency Fvco of an output signal according to a voltage of an input signal, a loop divider (18) that divides the frequency of a signal, which is acquired by causing a mixer (14) to mix a local signal generated by a local oscillator (12) and the output signal with each other, by N, a reference frequency divider (22) that divides the frequency of a reference signal, which is output by a reference signal oscillator (20), by R, a phase comparator (30) that outputs a signal according to a difference in phase between an output of the loop divider (18) and an output of the reference frequency divider (22), a loop filter (50) that passes low frequency components, and supplies the VCO (10) with the low frequency components, a subtractor (66) that outputs a difference between a voltage Vt of the input signal to be supplied to the VCO (voltage-controlled oscillator) (10) so that the frequency Fvco coincides with a target value Ft and the output of the loop filter (50), and switches (42, 44) that supply the loop filter (50) with the output of the phase comparator (30) or the output of the subtractor (66).
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