发明名称 METHOD AND APPARATUS FOR ACCESSING A CACHE
摘要 <p>A method and apparatus for accessing a processor cache. The method includes executing an access instruction in a processor core of the processor. The access instruction provides an untranslated effective address of data to be accessed by the access instruction. The method also includes determining whether a level one cache for the processor core includes the data corresponding to the effective address of the access instruction. The effective address of the access instruction is used without address translation to determine whether the level one cache for the processor core includes the data corresponding to the effective address. If the level one cache includes the data corresponding to the effective address, the data for the access instruction is provided from the level one cache. In a modification, the method includes receiving a request to access the cache. The request includes an address of requested data to be accessed. The method also includes using a first portion of the address to perform an access to a first directory for the cache and using a second portion of the address to perform an access to a second directory for the cache. Results from the access to the first directory for the cache and results from the access to the second directory for the cache are used to determine whether the cache includes the requested data to be accessed.</p>
申请公布号 WO2009000702(A1) 申请公布日期 2008.12.31
申请号 WO2008EP57620 申请日期 2008.06.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;IBM UNITED KINGDOM LIMITED;LUICK, DAVID, ARNOLD 发明人 LUICK, DAVID, ARNOLD
分类号 G06F12/08;G06F12/10 主分类号 G06F12/08
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