| 摘要 |
A nonvolatile memory device including input buffer is provided to improve receiving speed by synchronizing external address or data to writing enable signal in which cycle is reduced. A nonvolatile memory device has an input buffer(410) which receives data or address according to a first, a second, and a third writing enable signals. The second writing enable signal has a periodic time corresponding to 1/2 of a cycle of the first writing enable signal. The third writing enable signal has a periodic time corresponding to 1/4 of the cycle of the first writing enable signal. |
