发明名称 MULTIVALUED LOGIC CIRCUIT
摘要 In a bridge adder circuit, a first (1,3) and a second (2,4) complementary pair of current mirrors is connected between the input terminals (1,2) and a positive (9) and a negative (10) supply voltage bus, respectively, to control a first (5,6) and a second (7,8) push-pull output stage. The outputs of the push-pull output stages are connected to the respective inputs (11,12) through first resistors (24,25) and to a common output node (26) through second resistors (27,28). As a result, a universal circuit element for a multivalued logic element, such as ternary logic or 5-valued logic is provided.
申请公布号 WO2008135914(A3) 申请公布日期 2008.12.31
申请号 WO2008IB51671 申请日期 2008.04.30
申请人 BUDDHA BIOPHARMA OY LTD;OLEKSENKO, VIKTOR, VIKTOROVICH 发明人 OLEKSENKO, VIKTOR, VIKTOROVICH
分类号 G06F7/49;H03K19/00 主分类号 G06F7/49
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