发明名称 METHOD FOR FORMING METAL LAYER ARRAY IN FLASH MEMORY DEVICE
摘要 <p>A wiring layer array formation method of a flash memory device is provided to improve response speed of a flash memory device and degree of integration as configuration of a flash memory device is employed to 1- side pager buffer structure in which a page buffer domain is positioned in one side of a cell region. A wiring layer array formation method of a flash memory device comprises: a step for arranging a first wiring layer(310) which are arranged in a cell domain(301) to be extended to a page buffer domain(303) positioned in one side; a step for inserting and arranging a second wiring layer(330) between the first wiring layers of the page buffer domain; a step for relocating a part of the part arranged in the pager buffer area of the first wiring layers to be separated from the first wiring layer so that the interval between the first wiring layers and the second wiring layer which are adjacent to the second wiring layer is wider than the interval between the first wiring layers; and a step for exposure-scanning the layout(300) of the first wiring layers and the second wiring layer.</p>
申请公布号 KR20080113727(A) 申请公布日期 2008.12.31
申请号 KR20070062545 申请日期 2007.06.25
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JEONG, JOO HONG
分类号 H01L21/8247;H01L21/027 主分类号 H01L21/8247
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