METHOD FOR FORMING WAFER PATTERNS OF SEMICONDUCTOR DEVICES

摘要

A wafer pattern formation method of a semiconductor device is provided to reduce open area in which a wafer pattern is not actually formed on a wafer so that etch bias is predictably stabilized. A wafer pattern formation method of a semiconductor device comprises: a step for setting up layout(200) of circuit patterns(210) in a chip domain of a semiconductor device; a step for arranging a ladder type dummy pattern in which a line and space are repeated in order to fill up an open domain(202) except a domain in which the layout of the circuit patterns is established; and a step for forming the circuit pattern and dummy patterns by transferring the layout of the circuit pattern and dummy pattern(220) by an exposure and etching process on the wafer.