| 摘要 |
<p>A device for measuring the utilization ratio of an embedded system processor includes: a system bus connected with a bus monitor, a counter, and the processor; the bus monitor for monitoring the system bus, and it will generate a counter triggering signal when an anticipated bus feature is identified; a timer for setting the time span of a time interval for the utilization ratio statistic by setting its timing cycle; an interrupt controller for generating an interrupt triggering signal when the timing cycle of the timer arrives. Additionally, a method for measuring the utilization ratio of an embedded system processor is also provided.</p> |
