发明名称 |
Stalling Multi-cycle instructions |
摘要 |
In one embodiment, a pipelined processor is described that includes an execution pipeline having a plurality of stages and a multi-cycle instruction (MCI) controller adapted to assert a stall signal to stall the multi-cycle instruction within one of the stages of the execution pipeline. The MCI controller is adapted to issue a plurality of instructions to subsequent stages in the pipeline while the multi-cycle instruction is stalled. |
申请公布号 |
US7472259(B2) |
申请公布日期 |
2008.12.30 |
申请号 |
US20000731523 |
申请日期 |
2000.12.06 |
申请人 |
ANALOG DEVICES, INC. |
发明人 |
OVERKAMP GREGORY A.;ROTH CHARLES P.;SINGH RAVI P. |
分类号 |
G06F9/30;G06F9/32;G06F9/38;G06F9/40;G06F9/42 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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