发明名称 Semiconductor memory device for storing multilevel data
摘要 In a memory cell array, a plurality of memory cells are arranged in a matrix. Each of the plurality of memory cells stores one of a plurality of threshold levels. When writing one of the plurality of threshold levels into a first memory cell of the memory cell array, a control circuit writes a threshold level a little lower than the original threshold level. When not writing a second memory cell adjacent to the first memory cell consecutively, the control circuit writes the original threshold level into the first memory cell.
申请公布号 US7471559(B2) 申请公布日期 2008.12.30
申请号 US20070693213 申请日期 2007.03.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIBATA NOBORU
分类号 G11C11/34 主分类号 G11C11/34
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