发明名称 |
Trapping storage flash memory cell structure with inversion source and drain regions |
摘要 |
Methods of manufacturing a nitride trapping EEPROM flash memory are described where each memory cell uses Si-Fin to form a nitride trapping EEPROM flash cell in which the source region and drain region are undoped. Each adjacent poly-gate to a selected poly-gate in a row of nitride trapping memory cells is used to produce the inversion region that acts as a source region or a drain region for transferring of a required voltage, which conserves the density of a memory cell given that the source region and the drain region for each memory cell are not doped. The flash memory includes a plurality of polysilicon layers intersecting with a plurality of Si-Fin layers.
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申请公布号 |
US7471564(B2) |
申请公布日期 |
2008.12.30 |
申请号 |
US20080116688 |
申请日期 |
2008.05.07 |
申请人 |
MACRONIX INTERNATIONAL CO., LTD. |
发明人 |
HSU CHIA-LUN;LIU MU-YI |
分类号 |
G11C11/34 |
主分类号 |
G11C11/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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