发明名称 Multi CPU system
摘要 A multi CPU system is capable of performing exclusive control of a plurality of CPUs accessing to the same resource by a hardware without depending on an OS. The plurality of CPUs are connected with the same system bus. A plurality of circuits one-to-one correspond to each of the plurality of CPUs and comprise respective semaphore acquisition registers. Each of the CPUs in accessing to the resource is controlled, based on the value written in the semaphore acquisition register of the corresponding circuit, the presence or absence of the priority in the semaphore control, and a semaphore signal received from the another circuit.
申请公布号 US7472212(B2) 申请公布日期 2008.12.30
申请号 US20060397485 申请日期 2006.04.04
申请人 CANON KABUSHIKI KAISHA 发明人 SUZUKI KATSUNARI
分类号 G06F12/00 主分类号 G06F12/00
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