发明名称 Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress
摘要 A transistor may be formed of different layers of silicon germanium, a lowest layer having a graded germanium concentration and upper layers having constant germanium concentrations such that the lowest layer is of the form Si1-xGex. The highest layer may be of the form Si1-yGey on the PMOS side. A source and drain may be formed of epitaxial silicon germanium of the form Si1-zGez on the PMOS side. In some embodiments, x is greater than y and z is greater than x in the PMOS device. Thus, a PMOS device may be formed with both uniaxial compressive stress in the channel direction and in-plane biaxial compressive stress. This combination of stress may result in higher mobility and increased device performance in some cases.
申请公布号 US7470972(B2) 申请公布日期 2008.12.30
申请号 US20050078267 申请日期 2005.03.11
申请人 INTEL CORPORATION 发明人 KAVALIEROS JACK;BRASK JUSTIN K.;DOCZY MARK L.;METZ MATTHEW V.;DATTA SUMAN;DOYLE BRIAN S.;CHAU ROBERT S.;WANG EVERETT X.;MATAGNE PHILIPPE;SHIFREN LUCIAN;JIN BEEN Y.;STETTLER MARK;GILES MARTIN D.
分类号 H01L29/20 主分类号 H01L29/20
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