发明名称 Communication semiconductor integrated circuit, radio communication system, and adjustment method of gain and offset
摘要 A D.C. offset canceling technique and a gain adjusting technique permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a relatively short period of time in a radio communication system, such as a wireless LAN, are to be provided. A communication semiconductor integrated circuit (high frequency IC) has a plurality each of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level while eliminating unnecessary waves. Offset cancellation values are generated by detecting in advance D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers at the time of starting reception and altering the gain. Gain setting in a high gain amplifying section for amplifying reception signals is accomplished in two steps, rough setting and precise setting.
申请公布号 US7471748(B2) 申请公布日期 2008.12.30
申请号 US20040855596 申请日期 2004.05.28
申请人 RENESAS TECHNOLOGY CORP. 发明人 HABUKA TOSHIHITO;INOKAWA NAOTO;OZAKI KIYOHARU;MATSUURA TATSUJI;YAHAGI KOICHI
分类号 H03G3/20;H04L27/08;H03G3/30;H04B1/30;H04J11/00;H04L25/06;H04L27/22;H04L27/26;H04L27/38 主分类号 H03G3/20
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