发明名称 |
REDUNDANCY MEMORY CELL ACCESS CIRCUIT, SEMICONDUCTOR MEMORY DEVICE COMPRISING THE SAME AND TEST METHOD OF SEMICONDUCTOR MEMORY DEVICE |
摘要 |
A semiconductor memory device including a redundancy memory cell access circuit and test method thereof is provided to raise a yield by reducing a test time. A semiconductor memory device(10) comprises a redundancy memory cell array(150) and a redundancy memory cell access circuit(800). The redundancy memory cell array includes a redundancy memory cell for replacing a defective memory cell. The redundancy memory cell access circuit accesses the redundancy memory cell corresponding to an unprogrammed fuse signal by being enabled in a first test mode signal, and accesses the redundancy memory cell corresponding to a normal address signal by being enabled in a second test mode signal.
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申请公布号 |
KR20080112614(A) |
申请公布日期 |
2008.12.26 |
申请号 |
KR20070061219 |
申请日期 |
2007.06.21 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEO, EUN SUNG |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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