发明名称 Thermal enhanced upper and dual heat sink exposed molded leadless package
摘要 A semiconductor package includes a semiconductor device 30 and a molded upper heat sink 10. The heat sink has an interior surface 16 that faces the semiconductor device and an exterior surface 15 that is at least partially exposed to the ambient environment of the packaged device. An annular planar base 11 surrounds a raised or protruding central region 12. That region is supported above the plane of the base 11 by four sloped walls 13.1-13.4. The walls slope at an acute angle with respect to the planar annular base and incline toward the center of the upper heat sink 10. Around the outer perimeter of the annular base 11 are four support arms 18.1-18.4. The support arms are disposed at an obtuse angle with respect to the interior surface 16 of the planar annular base 11.
申请公布号 US7468548(B2) 申请公布日期 2008.12.23
申请号 US20050299270 申请日期 2005.12.09
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 WU CHUNG-LIN;JOSHI RAJEEV D.
分类号 H01L23/495 主分类号 H01L23/495
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