发明名称 |
METHOD OF TRANSFORMING FLIPFLOPS |
摘要 |
A method for transforming flip-flop is provided to satisfy timing condition by reducing a leakage current of a cycle circuit. A method for transforming flip-flop comprises the following steps: a step for replacing a plurality of original flip-flops with an asymmetry flip-flop showing the least leakage characteristic based on a stochastic leakage from among a first through a fourth asymmetry flip-flops; a step for producing a path graph to find the asymmetry flip-flop violated to a timing condition in a sequential circuit including replaced asymmetry flip-flops; a step for performing a timing analysis about a generated path graph(S620); a step for judging a path delay violating the timing condition based on a analyzed timing; a step for discovering a candidate asymmetry flip-flop inducing violation of the timing condition on the path delay; and a step for replacing the candidate asymmetry flip-flop with a flip-flop having a better timing characteristics. |
申请公布号 |
KR20080111209(A) |
申请公布日期 |
2008.12.23 |
申请号 |
KR20070059282 |
申请日期 |
2007.06.18 |
申请人 |
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY |
发明人 |
SHIN, YOUNG SOO;SEO, MYN JUN |
分类号 |
H03K17/16 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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