发明名称 Method and apparatus for disabling a clock signal within a multithreaded processor
摘要 A method includes maintaining an indication of a pending event with respect to each of a number of threads supported within a multithreaded processor. An indication is also maintained of an active or inactive state for each of the multiple threads. A clock disable condition is detected. This clock disable condition may be indicated by the absence of pending events with respect to each of the multiple threads and an inactive state for each of the multiple threads. A clocks signal, if enabled, is then disabled with respect to at least one functional unit within the multithreaded processor responsive to the detection of the clock disable condition.
申请公布号 HK1046045(A1) 申请公布日期 2008.12.19
申请号 HK20020107457 申请日期 2002.10.15
申请人 INTEL CORPORATION 发明人 DION RODGERS;BRET TOLL;AMIEE WOOD
分类号 G06F;G06F15/00;G06F9/38 主分类号 G06F
代理机构 代理人
主权项
地址