| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device which can suppress variation of forming voltage incident to scaling-down, and to provide its fabrication process. SOLUTION: A resistance variation portion 18 is located between a contact plug 16 functioning as a lower electrode and an upper electrode 19. Material of the resistance variation portion 18 is a Ti oxide. A trace 18a of linear hole exists in the central part on the plan view of the resistance variation portion 18. The trace 18a of hole extends from the surface of the resistance variation portion 18 in the depth direction. When a relatively large voltage is applied, false dielectric breakdown takes place at the trace 18a of hole and on the extension thereof and a filament is formed. In other words, forming is performed. The trace 18a of hole is formed simultaneously at the time of resistance variation portion 18 formation by deposition method such as CVD. Since the feature of the trace 18a of hole does not vary significantly, variation in forming voltage is suppressed. COPYRIGHT: (C)2009,JPO&INPIT
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