发明名称 |
IMAGE-CLOCK ADJUSTING CIRCUIT AND METHOD |
摘要 |
An image-clock adjusting circuit and a method thereof are provided to prevent color rolling phenomenon with relatively low cost. A phase comparator(31) compares the phase of the vertical synchronizing signal and the received electric source signal, and generates one or more phase comparison signal. A clock controller(32) controls a first clock width of the pixel clock signal by receiving the phase comparator signal, and the vertical synchronizing signal. A timing generator(32) adjusts the vertical synchronizing signal, and synchronize the vertical synchronizing signal with the power signal by receiving pixel clock signal.
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申请公布号 |
KR20080110459(A) |
申请公布日期 |
2008.12.18 |
申请号 |
KR20080023373 |
申请日期 |
2008.03.13 |
申请人 |
HOLTEK SEMICONDUCTOR INC. |
发明人 |
JEN CHUNG WENG;JAR LIN CHEN |
分类号 |
H04N5/04;H04N5/06;H04N5/335;H04N5/341;H04N5/351;H04N5/357;H04N5/376 |
主分类号 |
H04N5/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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