发明名称 Controlling write transactions between initiators and recipients via interconnect logic
摘要 There is disclosed a method of writing data from an initiator to a recipient via an interconnect block, comprising the steps of: (i) transmitting a write transaction request comprising an address indicating a destination for said write data from said initiator to said interconnect block; (ii) said interconnect block routing said write transaction request to said recipient in dependence upon said address; (iii) in response to receipt of said write transaction request at said recipient, said recipient determining said recipient's availability for receiving write data relating to said write transaction request; and (iv) in response to determining it is available transmitting an available request specific to said write transaction request to said interconnect block; (v) said interconnect block routing said available request to said initiator; (vi) said initiator transmitting at least some of said write data relating to said write transaction request to said interconnect block in response to receipt of said available request; and (vii) said interconnect block routing said at least some of said write data to said recipient.
申请公布号 US2008313365(A1) 申请公布日期 2008.12.18
申请号 US20080153534 申请日期 2008.05.20
申请人 ARM LIMITED 发明人 BRUCE ALASTAIR CRONE
分类号 G06F3/00 主分类号 G06F3/00
代理机构 代理人
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